1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a thin film transistor and a method for fabricating the same, which can improve a device reliability.
2. Background of the Related Art
In general, thin film transistors may be used in place of CMOS load transistors or load resistors in SRAM cells of 4M or 16M class or over, or as switching devices for switching video data signals from pixel regions in a liquid crystal display. Particularly, use of a PMOS thin film transistor (TFT) in the SRAM cell provides a decrease in an off-current and an increase on on-current. This reduces power consumption and improves the memory characteristics of the SRAM; therefore, providing a high quality SRAM cell.
A conventional thin film transistor and a method for fabricating the same will be explained with reference to the attached drawings. FIG. 1 illustrates a section of the conventional thin film transistor.
Referring to FIG. 1, the conventional thin film transistor is provided with an insulating layer 21, a gate electrode 22a formed on the insulating film 21, a gate insulating film 24 formed on the insulating film 21 inclusive of the gate electrode 22a, a drain electrode D formed on the gate insulating film 24 spaced from the gate electrode 22a, a source electrode S formed on the gate insulating film 24 opposite to the drain electrode D overlapped with the gate electrode 22a, and a channel region I and an offset region II formed between the source electrode S and the drain electrode D. The offset region 11 is a region between the drain region D and the gate electrode 22a.
A method for fabricating the conventional thin film transistor will be explained. FIGS. 2A-2D illustrate sections showing the steps of a background art method for fabricating a thin film transistor.
Referring to FIG. 2A, a first polysilicon layer 22 for forming a gate electrode of a bulk transistor is formed on an insulating layer 21. A photoresist film is coated on the first polysilicon layer and subjected to exposure and development, to form a mask pattern 23. The first polysilicon layer 22 is selectively etched using the mask pattern 23, to form a gate electrode 22a as shown in FIG. 2B. As shown in FIG. 2C, a gate insulating film 24 is deposited on the insulating layer 21 inclusive of the gate electrode 22a. Then a second polysilicon layer 25 to be used a source and drain electrodes, an offset region and a channel region of a thin film transistor is formed on the gate insulating film 24. A photoresist film 26 is coated on the second polysilicon layer 25 and subjected to patterning by exposure and development, such that the patterned photoresist film 26a defines a channel region and an offset region, as shown in FIG. 2D. Then, impurities for source/drain are injected into the second polysilicone layer 25 using the patterned photoresist film 26a as a mask, to form a source electrode S overlapped with the gate electrode 22a over a top portion of the gate electrode 22a and a drain electrode D spaced from the gate electrode 22a. And, a channel region I and an offset region II are formed between the source electrode S and the drain electrode D.
However, the conventional thin film transistor and method for fabricating the same have the following problems.
First, on-current is less, as the channel is formed only on one side.
Second, resistance is high, as the source/drain electrodes have a thickness identical to the channel portion.